Frank Eckardt
Key points:
- More than 14 years experience
- More than12 projects
- More than 10 companies
- Digital Design and Verification expert
Fields of Expertise:
- System and IP verification
- Verification automation for SoC families and SPIRIT based designs
- Advanced verification methodologies like ABV, CRV, CDV, eRM etc.
- Most relevant languages: SystemVerilog / Specman-e / SystemC / VHDL / Verilog
- Libraries OVM / AVM / SCV / eRM
- Latest tools from Cadence and Mentor Graphics: Incisive / Questa
- System Engineering and System Modelling
- Project and Team Management
- Consulting
Major projects:
- Verification of 32bit low-power microcontroller
- Design and verification of industrial communications transceiver
- Architecture and modelling of Real-time picture processing systems
- Verification automation of 16bit microcontroller family
- Design and verification of WLAN/DVB-H transceiver
- Architecture, design and verification of 10Gbit SDH/SONET-framer (inclusive VC, LCAS)
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